Rainbow Electronics ATtiny10 - Manual (Page 99)

99
8127B–AVR–08/09
ATtiny4/5/9/10
14.3.6 Operation
The TPI physical layer operates synchronously on the TPICLK provided by the external pro-
grammer. The dependency between the clock edges and data sampling or data change is
shown in
Figure 14-6 . Data is changed at falling edges and sampled at rising edges.
Figure 14-6. Data changing and Data sampling.
The TPI physical layer supports two modes of operation: Transmit and Receive. By default, the
layer is in Receive mode, waiting for a start bit. The mode of operation is controlled by the
access layer.
14.3.7 Serial Data Reception
When the TPI physical layer is in receive mode, data reception is started as soon as a start bit
has been detected. Each bit that follows the start bit will be sampled at the rising edge of the
TPICLK and shifted into the shift register until the second stop bit has been received. When the
complete frame is present in the shift register the received data will be available for the TPI
access layer.
There are three possible exceptions in the receive mode: frame error, parity error and break
detection. All these exceptions are signalized to the TPI access layer, which then enters the
error state and puts the TPI physical layer into receive mode, waiting for a BREAK character.
• Frame Error Exception. The frame error exception indicates the state of the stop bit. The
frame error exception is set if the stop bit was read as zero.
• Parity Error Exception. The parity of the data bits is calculated during the frame reception.
After the frame is received completely, the result is compared with the parity bit of the frame.
If the comparison fails the parity error exception is signalized.
• Break Detection Exception. The Break detection exception is given when a complete frame of
all zeros has been received.
14.3.8 Serial Data Transmission
When the TPI physical layer is ready to send a new frame it initiates data transmission by load-
ing the shift register with the data to be transmitted. When the shift register has been loaded with
new data, the transmitter shifts one complete frame out on the TPIDATA line at the transfer rate
given by TPICLK.
If a collision is detected during transmission, the output driver is disabled. The TPI access layer
enters the error state and the TPI physical layer is put into receive mode, waiting for a BREAK
character.
TPIDATA
TPICLK
SAMPLE
SETUP