Rainbow Electronics ATtiny10 - Manual (Page 8)

8
8127B–AVR–08/09
ATtiny4/5/9/10
4.4 General Purpose Register File
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve
the required performance and flexibility, the following input/output schemes are supported by the
Register File:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• One 16-bit output operand and one 16-bit result input
Figure 4-2 below shows the structure of the 16 general purpose working registers in the CPU.
Figure 4-2. AVR CPU General Purpose Working Registers
Note: A typical implementation of the AVR register file includes 32 general prupose registers but
ATtiny4/5/9/10 implement only 16 registers. For reasons of compatibility the registers are num-
bered R16...R31, not R0...R15.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
4.4.1 The X-register, Y-register, and Z-register
Registers R26..R31 have some added functions to their general purpose usage. These registers
are 16-bit address pointers for indirect addressing of the data space. The three indirect address
registers X, Y, and Z are defined as described in
Figure 4-3 .
7 0
R16
R17
General R18
Purpose …
Working R26 X-register Low Byte
Registers R27 X-register High Byte
R28 Y-register Low Byte
R29 Y-register High Byte
R30 Z-register Low Byte
R31 Z-register High Byte