Texas Instruments TMS320C3x - Manual (Page 754)

Index
Index-13
program (continued)
RPTB instruction 7-4–7-5
RPTS instruction 7-5–7-6
reset operation 7-21–7-25
TMS320LC31 power management mode
IDLE2 7-49–7-51
LOPOWER 7-51–7-52
memory 2-19
wait
due to multicycle access 8-11
until CPU data access completes 8-10
program-counter (PC) register 2-18, 3-18
programmable
bank switching 9-12–9-14
wait states 9-10–9-11, 10-15–10-16
pulse mode
timer interrupt 12-13
timer pulse generator 12-7–12-9
PUSH
floating-point value instruction (PUSHF) 13-197
integer instruction 13-196
Q
queue (stacks) 6-29, 6-31
R
RAM. See memory
RC register value, after repeat mode com-
pletes 7-7
read/write (R/W) pin, definition D-6
receive shift register (RSR) 12-28
receive/transmit timer
control register (serial port) 12-25–12-27
counter register (serial port) 12-27
period register (serial port) 12-28
register
addressing 6-3–6-29
conflicts 8-4
file
CPU 2-9
definition D-6
registers
buses 2-18
CPU 2-9
auxiliary (AR7–AR0) 2-10, 3-4
block size (BK) 2-11, 3-4
block-repeat (RS, RE) 3-17
data-page pointer (DP) 2-10, 3-4
extended-precision (R7–R0) 2-10, 3-3
condition flags 13-39
extended-precision registers (R7–R0) 7-9
I/O flag (IOF) 2-11, 3-16
index (IR1, IR0) 2-10, 3-4
interrupt flag (IF) 2-11, 3-11
asynchronous accesses 7-45
interrupt-trap table pointer (ITTP) bit 3-14
interrupt-enable (IE) 2-11, 3-9, 12-59–12-62
repeat end-address (RE) 7-2
repeat start-address (RS) 7-2
repeat-counter (RC) 2-11, 3-17, 7-2
status (ST) 2-11, 3-5, 13-29
system-stack pointer (SP) 2-11, 3-4, 6-29
DMA
destination and source address 12-57–12-59
global-control register 12-53–12-59
transfer-counter register 12-58–12-59
DMA channel control 7-38
instruction (IR) 2-12, 3-18
interrupt-enable (IE) 7-38
memory map, external memory interface 10-7
IOSTRB control 10-9
STRB0 10-8
STRB1 control 10-8
peripherals
receive/transmit timer control 12-25
serial port 12-15–12-47
FSR/DR/CLKR 12-23
FSX/DX/CLKX 12-22
global-control 12-17–12-21
timer 12-3
counter 12-7
global-control 12-4
period 12-7
pipeline conflicts 8-6
program-counter (PC) 2-12, 2-18, 3-18
repeat mode operation 7-3–7-4
reserved bits and compatibility 3-19
repeat
block instruction (RPTB) 13-209
See also RPTB instruction
single instruction (RPTS) 13-211
See also RPTS instruction