Texas Instruments TMS320C3x - Manual (Page 580)

LDF||STF Parallel LDF and STF
13-122
Example LDF *AR2 – – (1),R1
|| STF R3,*AR4++(IR1)
Before Instruction After Instruction
R1 00 0000 0000 R1 07 0C80 0000
R3 05 7B40 0000 R3 05 7B40 0000
AR2 80 98E7 AR2 80 98E6
AR4 80 9900 AR4 80 9910
IR1 10 IR1 10
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 0
Z 0 Z 0
V 0 V 0
C 0 C 0
Data memory
8098E7h 70C8000 8098E7h 70C8000
809900h 0 809900h 57B4000
1.4050e+02
6.28125e+01
1.4050e+02
6.28125e+01
6.28125e+01
1.4050e+02
Note: Cycle Count
See Section 8.5.2, Data Loads and Stores, on page 8-24 for the effects of
operand ordering on the cycle count.