Texas Instruments TMS320C3x - Manual (Page 75)

CPU Multiport Register File
3-12
Figure 3–7. TMS320C30 CPU Interrupt Flag (IF) Register
XINT1 RINT1 yy yy
7 11 15–12 31–16
xx
10
DINT
9
TINT1
8
TINT0
5
RINT0
4
XINT0
3
INT3
2
INT2
1
INT1
6 0
INT0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Notes: 1) xx = reserved bit, read as 0
2) yy = reserved bit, set to 0 at reset; can store value
3) R = read, W = write
Figure 3–8. TMS320C31 CPU Interrupt Flag (IF) Register
yy yy xx
7 11 15–12 31–16
xx
10
DINT
9
TINT1
8
TINT0
5
RINT0
4
XINT0
3
INT3
2
INT2
1
INT1 xx
6 0
INT0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Notes: 1) xx = reserved bit, read as 0
2) yy = reserved bit, set to 0 at reset
3) R = read, W = write
Figure 3–9. TMS320C32 CPU Interrupt Flag (IF) Register
DINT1 xx xx
7 11 15–12 31–16
ITTP
10
DINT0
9
TINT1
8
TINT0
5
RINT0
4
XINT0
3
INT3
2
INT2
1
INT1 xx
6 0
INT0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Notes: 1) xx = reserved bit, read as 0
2) R = read, W = write