Texas Instruments TMS320C3x - Manual (Page 349)

Bus Timing
10-46
Figure 10–32 and Figure 10–33 illustrate the transitions between STRBx
writes and IOSTRB writes and reads, respectively. In these transitions, the
address changes on the falling edge of the H3 cycle.
Figure 10–32. STRBx Write and IOSTRB Write
Write I/O write
STRBx
IOSTRB
RDY
D
A
R/W
H1
H3
Figure 10–33. STRBx Write and IOSTRB Read
Write
STRBx
IOSTRB
RDY
D
A
R/W
H1
H3
I/O read