Texas Instruments TMS320C3x - Manual (Page 554)

DBcond Decrement and Branch Conditionally (Standard)
13-96
Cycles 4
Status Bits LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z Unaffected
V Unaffected
C Unaffected
OVM Operation is not affected by OVM bit value.
Example CMPI 200,R3
DBLT AR3,R2
Before Instruction After Instruction
R2 00 0000 009F R2 00 0000 009F
R3 00 0000 0080 R3 00 0000 0080
AR3 00 0012 AR3 00 0011
PC 005F PC 009F
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 1 N 1
Z 0 Z 0
V 0 V 0
C 0 C 0
Mode Bit