Texas Instruments TMS320C3x - Manual (Page 556)

DBcondD Decrement and Branch Conditionally (Delayed)
13-98
Cycles 1
Status Bits LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z Unaffected
V Unaffected
C Unaffected
OVM Operation is not affected by OVM bit value.
Example CMPI 26h,R2
DBZD AR5, $+110h
Before Instruction After Instruction
R2 00 0000 0026 R2 00 0000 0026
AR5 00 0067 AR5 00 0066
PC 0100 PC 0210
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 0
Z 0 Z 1
V 0 V 0
C 0 C 0
Mode Bit