Texas Instruments TMS320C3x - Manual (Page 593)

Divide Clock by 16 LOPOWER
13-135 Assembly Language Instructions
Syntax LOPOWER (supported by: ’LC31 and ’C32, ’C31 silicon
revision
5.0 or greater, ’C30 silicon revision 7.0
or greater)
Operation H1
→
H1/16
Operands None
Opcode
31 23 0
0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
Description The device continues to execute instructions, but at the reduced rate of the
CLKIN frequency divided by 16 (that is, in LOPOWER mode, a ’C3x device that
supports this mode with a CLKIN frequency of 32 MHz performs in the same
way as a 2-MHz ’C3x device, which has an instruction-cycle time of 1000 ns).
This allows for low-power operation.
The ’C3x CPUs slow down during the read phase of the LOPOWER instruc-
tion. To exit the LOPOWER power-down mode, invoke the MAXSPEED
instruction (opcode = 1080 0000 h). The ’C3x resumes full-speed operation
during the read phase of the MAXSPEED instruction.
Do not run the IDLE2 instruction in the LOPOWER mode.
Cycles 1
Status Bits LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z Unaffected
V Unaffected
C Unaffected
OVM Operation is not affected by OVM bit value.
Example LOPOWER ; The processor slows down operation to
; 1/16th of the H1 clock.
Mode Bit