Texas Instruments TMS320C3x User Manual
Page 746
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Index
Index-5
carry bit, definition
carry flag
central processing unit.
See CPU
circular addressing
algorithm
buffer
definition
FIR filters
operation
CLKX pins
clock mode
timer interrupt
timer pulse generator
clock periods, minor
compare
floating-point value instruction (CMPF)
integer instruction (CMPI)
comparison, feature set
condition codes and flags
condition flag
floating-point underflow
latched floating-point underflow
latched overflow
negative
overflow
zero
conditional delayed branches
compare instructions
extended-precision registers
context save/restore, definition
control register
control registers, external interface
expansion bus
primary bus
conversion
floating-point to integer
integer to floating-point
counter register (timer)
CPU
arbitration
block diagram
cycle, definition
definition
general
interrupt
DMA interaction
latency
CPU (continued)
processing, block diagram
processing cycle
primary registers
register file
registers
auxiliary (AR7–AR0)
block size (BK)
block-repeat (RS, RE)
data-page pointer (DP)
extended-precision (R7–R0)
I/O flag (IOF)
index (IR1, IR0)
interrupt flag (IF)
bits defined
interrupt-enable (IE)
list of
program-counter (PC)
repeat end-address (RE)
repeat start-address (RS)
repeat-counter (RC)
reserved bits and compatibility
status (ST)
system-stack pointer (SP)
transfer, with serial-port transmit pol-
ling
D
D0-D31, definition
data, buses
data formats
floating-point
addition and subtraction
conversion to integer
floating-point formats
conversion between formats
extended-precision
short
single-precision
integer
single-precision
unsigned
integer to floating-point conversion
normalization using NORM instruc-
tion
rounding with RND instruction
unsigned-integer formats, single-preci-
sion
data memory, TMS320C32