Texas Instruments TMS320C3x - Manual (Page 43)

Central Processing Unit (CPU)
2-7 Architectural Overview
Figure 2–4. Central Processing Unit (CPU)
Multiplexer
Multiplier
32-bit barrel
shifter
Extended-
precision
registers
(R0–R7)
Disp†, IR0, IR1
ARAU0 ARAU1
Auxiliary
registers
(AR0–AR7)
Other
registers
(12)
32 32 40 40
40
40
40
40
40
32
24
24
32
32
32
32
24
24
32
32
BK
40
ALU
DADDR1 bus
DADDR2 bus
DDATA bus
CPU1 bus
CPU2 bus
REG1 bus
REG2 bus
REG1 bus CPU1 bus REG2 bus
DADDR2 bus DADDR1 bus
† Disp = an 8-bit integer displacement carried in a program-control instruction