Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (January 2015) - Manual (Page 20)

ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
About this Manual
20
About this Manual
Abbreviations
This document uses the following abbreviations:
Abbreviation Definition
ACE Asynchronous Communications Element
ATCA Advanced Telecom Computing Architecture
BBS Basic Blade Services
BIOS Basic Input/Output System
DDR Dual Data Rate (type of SDRAM)
DDR3 Double Data Rate 3 synchronous dynamic random access
memory (SDRAM) is the name of the new DDR memory
standard that is being developed as the successor to DDR2
SDRAM
DR Data Ready
DRAM Dynamic Random Access Memory
DCTS Delta Clear-To-Send
DDSR Delta Data Set Ready
DDCD Delta Data Carrier Detect
ECC Error Correction Code
EDAC Error Detection and Correction
EEPROM Electrically Erasable Programmable Read Only Memory
EMC Electro-magnetic Compatibility
ESD Electro-static Discharge
FIFO First In/First Out
FRU Field Replaceable Unit
FCR FIFO Control Register
GPIO General Purpose Input/Output
I2C Inter Integrated-Circuit Bus (2-wire serial bus and protocol)
ICH I/O Control Hub (also called "South Bridge")
IER Interrupt Enable Register