Table 6-13, Global configuration register summary, Table 6-14 – Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (January 2015) User Manual
Page 127: Super io logical device number register, Table 6-15, Super io device revision register, Maps and registers, 1 global control configuration registers
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Maps and Registers
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
127
6.2.3.4.1 Global Control Configuration Registers
The Super IO Global Registers lie in the address range 0x00-0x2F. All eight bits of the ADDRESS
port are used for register selection. All non-implemented registers and bits ignore writes and
return zero when read. The INDEX port is used to select a configuration register in the chip. The
DATA port is then used to access the selected register. These registers are accessible only in the
configuration mode.
Table 6-13 Global Configuration Register Summary
Index Address
Description
0x07
Super IO Logical Device Number
0x20
Super IO Device ID
0x21
Super IO Device Revision
0x28
Super IO LPC Control
0x29
Super IO SERIRQ and Pre-divide Control
Table 6-14 Super IO Logical Device Number Register
Index Address: 0x07
Bit
Description
Default
Access
7:0
Logical Device Number:
0x04: Logical Device 4 (UART 1Serial Port 1)
0x05: Logical Device 5 (UART2 Serial Port 2)
A write to this register selects the current
logical device. This allows access to the
control and configuration registers for each
logical device.
0
LPC: r/w
Table 6-15 Super IO Device Revision Register
Index Address: 0x21
Bit
Description
Default
Access
7:0
Device Revision
0x01
LPC: r