Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (January 2015) - Manual (Page 151)

Maps and Registers
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H) 151
0x18 rw - IPMC Watchdog Timeout for BIOS Register
0x19 rw - IPMC Watchdog Timeout for OS Register
0x1A rw - FPGA-Payload-Watchdog Threshold Low-byte
Register
0x1B rw - FPGA-Payload-Watchdog Threshold High-byte
Register
0x1C rw - FPGA-Payload-Watchdog Clear Register
0x1D~1E - - Reserved
0x1F - w FPGA-IPMC-Watchdog Threshold Register
0x20~2D - - Reserved
0x2E - rw HFI Mode Enable Register
0x2F~32 - rw HFI Mode POL Control Registers
0x33~36 - rw HFI Mode Reset Control Registers
0x37~3F - - Reserved
0x40 r rw Flash Control Register
0x41~48 - - Reserved
0x49 r rw IPMC Scratch Register 0.
0x4A r rw RTM Status and Control Register
0x4B~55 - - Reserved
0x56 r rw Blue LED Status and Control Register
0x57 rw r User LED Status and Control Register
0x58 r r MISC Status and Control Register
0x59 r r Debug Switch and LED Status Register
0x5A r r CPU Error Status Register
0x5B r rw Cave Creek Module Status and Control Register
0x5C r rw ACPI Status and Control Register
Table 6-42 FPGA Register Map (continued)
Address Offset 1
LPC
I/O IPMC
SPI
Description
1 For LPC I/O access, add the LPC I/O Base Address 0x600