Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (January 2015) - Manual (Page 161)

Maps and Registers
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H) 161
6.3.12.6 Payload Reset Source for IPMC Register
The IPMC reset source register stores the source of the most recent reset. A "one" in the register
bit indicates that the associated reset has occurred. If more than one reset occurs from
different sources without clearing the corresponding register bits, one cannot determine the
most recent reset source since more than one bit will be set. The same situation will occur if two
reset sources are active at the same time.
6.3.12.7 Payload Reset Source for BIOS Register
The BIOS reset source register stores the source of the most recent reset. A "one" in the register
bit indicates that the associated reset has occurred. If more than one reset occurs from
different sources without clearing the corresponding register bits, one cannot determine the
most recent reset source since more than one bit will be set. The same situation will happen if
two reset sources go active at the same time.
Table 6-57 Payload Reset Source for IPMC Register
Address Offset: 0x14
Bit Description Default Access
0 Payload Power-on reset
1: Reset occurred RST_N:1 IPMC: r/w1c
1 Reserved 0 IPMC: r/w1c
2 Front board push button reset payload
request
1: Reset occurred 0 IPMC: r/w1c
3 IPMC reset payload request
1: Reset occurred 0 IPMC: r/w1c
4 RTM push button reset request
1: Reset occurred 0 IPMC: r/w1c
5 FPGA Watchdog reset payload request
1: Reset occurred 0 IPMC: r/w1c
6 BIOS reset payload request
1: Reset occurred 0 IPMC: r/w1c
7 OS reset payload request
1: Reset occurred 0 IPMC: r/w1c