Registers, Chapter 8. registers – Altera 10-Gbps Ethernet MAC MegaCore Function User Manual
Page 95

February 2014
Altera Corporation
10-Gbps Ethernet MAC MegaCore Function User Guide
8. Registers
This section defines the MAC registers. The statistics collected on the transmit and
receive datapaths are categorized as good, error, or invalid frames.
■
Good frame—Error-free frames with a valid frame length.
■
Error frame—Frames that contain errors or with an invalid frame length.
■
Invalid frame—Frames that are not addressed to the MAC. It may or may not
contain error within the frame or have an invalid frame length. The MAC drops
invalid frames.
When you select the MAC Rx only variation, the register offsets from 0x000 to 0x3FFF
are available for Rx status and configuration registers. Similarly, when you select the
MAC TX only variation, the register offsets from 0x4000 to 0x7FFF are available for TX
status and configuration registers. All status and configuration registers are as
defined in
Table 8–2 on page 8–2
.
c
Altera recommends accessing only the available register spaces in the MAC Rx only
variation or the MAC TX only variation. Accessing unavailable register spaces may
cause the MAC to lock the Avalon-MM bus.
1
Altera has updated all register address for the 10GbE MAC IP core as part of register
map expansion to accommodate new registers.
summarizes the changes.
.
Table 8–1. Summary of Register Address Expansion
Component Name
Previous Address Range
(ACDS Version 10.0, 10.1)
New Address Range
(ACDS Version 11.0 Onwards)
RX Datapath
RX Packet Transfer
0x000:0x00F
0x000:0x0FF
RX Pad/CRC Remover
0x010:0x01F
0x100:0x1FF
RX CRC Checker
0x020:0x0FF
0x200:0x2FF
RX Packet Overflow
0x180:0x1FF
0x300:0x3FF
RX Preamble Control
—
0x400:0x4FF
RX Lane Decoder
—
0x500:0x1FFF
RX Frame Decoder
0x100:0x17F
0x2000:0x2FFF
RX Statistics Counters
0x200:0x3FF
0x3000:0x3FFF
TX Datapath
TX Packet Transfer
0x400:0x40F
0x4000:0x40FF
TX Pad Inserter
0x410:0x41F
0x4100:0x41FF
TX CRC Inserter
0x420:0x45F
0x4200:0x42FF
TX Packet Underflow
0x580:0x5FF
0x4300:0x43FF
TX Preamble Control
—
0x4400:0x44FF
TX Pause Frame Control and
Generator
0x460:0x47F
0x4500:0x45FF