Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 116)

8–22 Chapter 8: Registers
Register Initialization
10-Gbps Ethernet MAC MegaCore Function User Guide February 2014 Altera Corporation
drop_on_error (address = 0x00010414) = 0x1
//Enable Drop On Error in TX Single Clock FIFO
//Drop on Error is NOT available in Cut Through Mode
//drop_on_error byte address: 0x14
//Set this to 0 will disable the drop on error
drop_on_error (address = 0x00010614) = 0x1
b. Setting for dual-clock FIFO
Because the drop on error and store and forward features are not supported, you
are not required to perform any register initialization.
■ Ethernet loopback
//Ethernet Loopback Base Address: 0x00010200
//Disable Line Loopback
//line_loopback byte address: 0x00
//Set this to 1 will enable the Line loopback
line_loopback (address = 0x00010200) = 0x0
//Disable Local Loopback
//local_loopback byte address: 0x08
//set this to 1 will enable the local loopback
local_loopback (address = 0x00010208) = 0x0
4. MAC configuration register initialization
The 10GbE MAC is configured as promiscuous mode by default; therefore it does not
require any initialization to transmit and receive Ethernet frames. Use the following
recommended initialization sequences for your configuration:
a. Disable MAC transmit and receive datapath
Disable the 10GbE MAC transmit and receive datapath before changing any
configuration register.
//Disable the MAC Receive Path
//rx_transfer_control byte address: 0x000
rx_transfer_control (address = 0x00000000) = 0x1
//Disable the MAC Transmit Path
//tx_transfer_control byte address: 0x4000
tx_transfer_control (address = 0x00004000) = 0x1
//Check the MAC Transmit and Receive Path is disable
//rx_transfer_status byte address: 0x004
Wait rx_transfer_status (address = 0x00000004) = 0x1
//tx_transfer_status byte address: 0x4004