Altera 10-Gbps Ethernet MAC MegaCore Function User Manual
Page 140
Chapter 9: Interface Signals
9–21
February 2014
Altera Corporation
10-Gbps Ethernet MAC MegaCore Function User Guide
describes the TX egress timestamp interface signals for the IEEE 1588v2
feature.
rx_ingress_timestamp_64b_data
Output
64
Carries the ingress timestamp on the receive
datapath. Consists of 48-bit nanoseconds field
and 16-bit fractional nanoseconds field.
The MAC presents the timestamp for all receive
frames and asserts this signal in the same clock
cycle it asserts
rx_ingress_timestamp_64b_valid
.
rx_ingress_timestamp_64b_valid
Output
1
When asserted, this signal indicates that
rx_ingress_timestamp_64b_data
contains
valid timestamp.
For all receive frame, the MAC asserts this signal
in the same clock cycle it receives the start of
packet (avalon_st_rx_startofpacket is
asserted).
Table 9–10. IEEE 1588v2 RX Ingress Timestamp Interface Signals (Part 2 of 2)
Signal
Direction
Width
Description
Table 9–11. IEEE 1588v2 TX Egress Timestamp Interface Signals (Part 1 of 2)
Signal
Direction
Width
Description
tx_egress_timestamp_request_valid
Input
1
Assert this signal when a user-defined
tx_egress_timestamp
is required for a
transmit frame.
Assert this signal in the same clock cycle as the
start of packet
(avalon_st_tx_startofpacket is asserted).
tx_egress_timestamp_request_fingerprint
Input
1-16
Use this bus to specify fingerprint for the
user-defined tx_egress_timestamp. The
fingerprint is used to identify the user-defined
timestamp.
The signal width is determined by the
TSTAMP_FP_WIDTH parameter.
The value of this signal is mapped to
user_fingerprint
.
This signal is only valid when you assert
tx_egress_timestamp_request_valid
.
tx_egress_timestamp_96b_data
Output
96
A transmit interface signal. This signal requests
timestamp of frames on the TX path. The
timestamp is used to calculate the residence
time.
Consists of 48-bit seconds field, 32-bit
nanoseconds field, and 16-bit fractional
nanoseconds field.