Architecture, Architecture –23 – Altera 10-Gbps Ethernet MAC MegaCore Function User Manual
Page 90
Chapter 7: Functional Description
7–23
IEEE 1588v2
February 2014
Altera Corporation
10-Gbps Ethernet MAC MegaCore Function User Guide
7.9.1. Architecture
Figure 7–13
shows the overview of the IEEE 1588v2 feature.
Figure 7–13. Overview of IEEE 1588v2 Feature
(Note 1)
Note to
Figure 7–13
:
(1) This figure shows only the datapaths related to the IEEE 1588v2 feature.
IEEE 1588v2
Tx Logic
IEEE 1588v2
Rx Logic
PTP Software
Stack
Time-of-Day
Clock
PHY
Tx
PHY
Rx
10GbE MAC IP
10GBASE-R PHY iP
tx_path_delay
rx_path_delay
Timestamp &
User Fingerprint
Correction
Time of Day
Timestamp Aligned to
Receive Frame
tx_egress_timestamp_request
tx_ingress_timestamp
tx_time_of_day
rx_time_of_day
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