Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 41)

Chapter 4: 10GbE MAC with IEEE1588v2 Design Example 4–3
10GbE with IEEE 1588v2 Design Example Components
February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
The 10GbE with IEEE 1588v2 design example comprises the following components:
■ Altera Ethernet 10G design example—the default 10G design example that has the
following settings:
■ 10GbE Ethernet MAC—the MAC IP core with IEEE 1588v2 option enabled.
■ 10GBASE-R PHY—the PHY IP core with IEEE 1588v2 option enabled.
■ Ethernet Loopback—the loopback module provides a mechanism for you to
verify the functionality of the MAC and PHY.
■ MDIO and FIFO features turned off.
■ Transceiver Reconfiguration Controller—dynamically calibrates and reconfigures
the features of the PHY IP cores.
■ Ethernet Packet Classifier—decodes the packet type of incoming PTP packets and
returns the decoded information to the 10GbE Ethernet MAC.
■ Ethernet Time-of-Day (ToD) Clock—provides 64-bits and/or 96-bits time-of-day to
TX and RX of 10GbE Ethernet MAC.
■ Pulse Per Second Module—returns pulse per second (pps) to user.
■ Avalon MM Master Translator—provides access to the registers of the following
components through the Avalon-MM interface:
■ MAC and Ethernet Loopback
■ Transceiver Reconfiguration Controller
■ ToD
f
For more information about ToD clock, refer to Appendix B, Time-of-Day (ToD)
Clock ; and for more information about Packet Classifier, refer to Appendix C, Packet
Classifier .
4.2.1. Base Addresses
Table 4–1 lists the design example components that you can reconfigure to suit your
verification objectives. To reconfigure the components, write to their registers using
the base addresses listed in the table and the register offsets described in the
components' user guides.
1 This design example uses a 19-bit width address bus to access the base address of
components other than the MAC.
Table 4–1. Base Addresses of 10GbE with IEEE 1588v2 Design Example Components
Component Base Address
MAC and Ethernet Loopback 0x00000
Transceiver Reconfiguration Controller 0x80400
Time of Day Clock 0x81000