Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 60)

February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
6. 10M-10GbE MAC with IEEE 1588v2
Design Example
This section describes the 10M/100M/1G/10 Gbps Ethernet (10M-10GbE) MAC with
IEEE 1588v2 design example, the testbench, and its components.
6.1. Software and Hardware Requirements
Altera uses the following hardware and software to test the 10M-10GbE MAC with
IEEE 1588v2 design example and testbench:
■ Altera Complete Design Suite 13.0
■ Stratix V GX FPGA Development Kit
■ ModelSim-SE 10.0b or higher
6.2. 10M-10GbE MAC with IEEE 1588v2 Design Example Components
You can use the 10M-10GbE MAC IP core design example to simulate a complete
10M-10GbE MAC with IEEE 1588v2 design in a simulator. You can compile the design
example using the Quartus II software and program the targeted Altera device after a
successful compilation.
Figure 6–1 shows the block diagram of a 10M-10GbE MAC with IEEE 1588v2 design
example.
1
For the purpose of simplification, this diagram shows only one of the two channels in
the design example. Each channel has its own components but they share the
Avalon-MM Master Translator and Reconfiguration Bundle blocks.