Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 23)

Chapter 3: 10GbE MAC Design Examples 3–5
10GbE Design Example Files
February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
3.3. 10GbE Design Example Files
Figure 3–2 shows the directory structure for the design examples and testbenches. The
..\csr_script directory contains the design example script files.
Table 3–3 lists the design example files. For the description of testbench files, refer to
Table 3–5 on page 3–10 .
Figure 3–2. Design Example Folders
Table 3–3. 10GbE Design Example Files (Part 1 of 2)
File Name Description
setup_proj.tcl
A Tcl script that creates a new Quartus II project
and sets up the project environment for your
design example. Not applicable for Stratix V
design.
setup_proj_sv.tcl
A Tcl script that creates a new Quartus II project
for Stratix V design and sets up the project
environment for your design example.
altera_eth_10g_design_mac_xaui.qsys
A Qsys file for the 10GbE MAC and XAUI PHY
design example. The PHY is set to hard XAUI by
default.
altera_eth_10g_design_mac_xaui_sv.qsys
A Qsys file for the 10GbE MAC and XAUI PHY
design example with the Quartus II software
targeting the Stratix V device. The PHY is set to
hard XAUI by default.
altera_eth_10g_design_mac_base_r.qsys
A Qsys file for the 10GbE MAC and 10GBASE-R
PHY design example.
altera_eth_10g_design_mac_base_r_sv.qsys
A Qsys file for the 10GbE MAC and 10GBASE-R
PHY design example with the Quartus II software
targeting the Stratix V device.
/ethernet/altera_eth_10g_design_example
altera_eth_10g_mac_base_r
testbench
altera_eth_10g_mac_base_r_sv
testbench
altera_eth_10g_mac_xaui
testbench
altera_eth_10g_mac_xaui_sv
testbench
csr_scripts
design_example_components
source