Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 109)

Chapter 8: Registers 8–15
MAC Registers
February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
0x0C30
rx_stats_etherStats Fragments
RO 0x0
■ Bit 0—The total number of receive or
transmit frames with length less than 64
bytes and CRC error. This count includes
errored and invalid frames.
■ 36-bit width register:
■ 0x0C30 and 0x0C31 = bits [31:0]
■ 0x1C30 and 0x1C31 = bits [35:32]
0x0C31
0x1C30
tx_stats_etherStats Fragments
0x1C31
0x0C32
rx_stats_etherStats Jabbers RO 0x0
■ Bit 0—The number of oversized receive
frames (frame length more than
rx_frame_maxlength
) with CRC error.
This count includes invalid frame types.
■ 36-bit width register:
■ 0x0C32 = bits [31:0]
■ 0x0C33 = bits [35:32]
0x0C33
0x1C32
tx_stats_etherStats Jabbers RO 0x0
■ Bit 0—The number of oversized transmit
frames (frame length more than 1,518
bytes) with CRC error. This count includes
invalid frame types.
■ 36-bit width register:
■ 0x1C32 = bits [31:0]
■ 0x1C33 = bits [35:32]
0x1C33
0x0C34
rx_stats_etherStats CRCErr RO 0x0
■ Bit 0—The number of receive frames
between the length of 64 and the value
configured in the rx_frame_maxlength
register with CRC error. This count includes
errored and invalid frames.
■ 36-bit width register:
■ 0x0C34 = bits [31:0]
■ 0x0C35 = bits [35:32]
0x0C35
0x1C34
tx_stats_etherStats CRCErr RO 0x0
■ Bit 0—The number of transmit frames
between the length of 64 and 1,518 bytes.
This count includes errored and invalid
frames.
■ 36-bit width register:
■ 0x1C34 = bits [31:0]
■ 0x1C35 = bits [35:32]
0x1C35
0x0C36
rx_stats_unicastMAC CtrlFrames
RO 0x0
■ Bit 0—The number of valid unicast control
frames received or transmitted.
■ 36-bit width register:
■ 0x0C36 and 0x0C37 = bits [31:0]
■ 0x1C36 and 0x1C37 = bits [35:32]
0x0C37
0x1C36
tx_stats_unicastMAC CtrlFrames
0x1C37
Table 8–2. MAC Registers (Part 14 of 15)
Word
Offset
Register Name Access
Reset
Value
Description