Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 82)

Chapter 7: Functional Description 7–15
Transmit and Receive Latencies
February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
7.5.8. Overflow Handling
When an overflow occurs on the client side, the client can backpressure the Avalon-ST
receive interface by deasserting the avalon_st_rx_ready signal. If an overflow occurs
in the middle of frame transmission, the MAC RX truncates the frame by sending out
the avalon_st_rx_endofpacket signal after the avalon_st_rx_ready signal is
reasserted. The error bit, avalon_st_rx_error[5], is set to 1 to indicate an overflow. If
frame transmission is not in progress when an overflow occurs, the MAC RX drops
the frame.
7.6. Transmit and Receive Latencies
Altera uses the following definitions for the transmit and receive latencies:
■ Transmit latency is the number of clock cycles the MAC function takes to transmit
the first byte on the network-side interface (XGMII SDR) after the bit was first
available on the Avalon-ST interface.
■ Receive latency is the number of clock cycles the MAC function takes to present
the first byte on the Avalon-ST interface after the bit was received on the
network-side interface (XGMII SDR).
Table 7–3 shows the transmit and receive nominal latencies of the MAC.
7.7. Congestion and Flow Control
The flow control, as specified by IEEE 802.3 Annex 31B, is a mechanism to manage
congestion at the local or remote partner. When the receiving device experiences
congestion, it sends an XOFF pause frame to the emitting device to instruct the
emitting device to stop sending data for a duration specified by the congested
receiver. Data transmission resumes when the emitting device receives an XON pause
frame (pause quanta = zero) or when the timer expires.
Table 7–3. Transmit and Receive Latencies of the MAC
MAC Configuration
Latency (Clock Cycles) (1) (2)
Transmit
(with respect to TX clock)
Receive
(with respect to RX clock)
MAC only 10 12
MAC with 10 Mbps mode 300 3,459
MAC with 100 Mbps mode 47 354
MAC with 1 Gbps mode 16 42
Notes to Table 7–3 :
(1) The clocks in all domains are running at the same frequency.
(2) The latency values are based on the assumption that there is no backpressure on the Avalon-ST TX and RX
interface.