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2 at power on timing, Figure 5-6: at power on sequence, Table 5-4: at power on sequence timing – IEI Integration ICE-DB-9S User Manual

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ICE Module

Page 94

5.5.2 AT Power On Timing

T0

T1

T2

T3

T4

T5

T6

+VBAT(3.3V)

SUS_S3#

+V12

+V5,+V3.3

ICE Power Rail

CB_RESET#

PCI_RESET#

BIOS Starts

Notes: Do not need 5VSB.

Figure 5-6: AT Power On Sequence

Table 5-4: AT Power On Sequence Timing

Parameters min

Max

Description

T0

T1

T2

T3

T4

T5

T6

NOTE:

Please follow the power requirement provided in Chapter 2 to design the

baseboard requested by the customer.

See also other documents in the category IEI Integration Hardware: