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Table 6-11, Global configuration register summary, Table 6-12 – Artesyn ATCA-7365 Installation and Use (May 2014) User Manual

Page 170: Super io logical device number register, Table 6-13, Super io device identification register, Maps and registers, 1 global control configuration registers

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Maps and Registers

ATCA-7365 Installation and Use (6806800K65M)

170

6.3.3.3.1 Global Control Configuration Registers

The Super IO Global Registers lie in the address range 0x00-0x2F. All eight bits of the ADDRESS
Port are used for register selection. All unimplemented registers and bits ignore writes and
return zero when read. The INDEX PORT is used to select a configuration register in the chip.
The DATA PORT is then used to access the selected register. These registers are accessible only
in the Configuration Mode.

Table 6-11 Global Configuration Register Summary

Index Address

Description

0x07

Super IO Logical Device Number

0x20

Super IO Device ID

0x21

Super IO Device Revision

0x28

Super IO LPC Control

0x29

Super IO SERIRQ and Pre-divide Control

Table 6-12 Super IO Logical Device Number Register

Index Address: 0x07

Bit

Description

Default

Access

7:0

Logical Device Number:
0x04: Logical Device 4 (UART 1Serial Port 1)
0x05: Logical Device 5 (UART2 Serial Port 2)
A write to this register selects the current logical
device. This allows access to the control and
configuration registers for each logical device.

0

LPC: r/w

Table 6-13 Super IO Device Identification Register

Index Address: 0x20

Bit

Description

Default

Access

7:0

Device ID

0

LPC: r