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2 multi-bit ecc memory error, 3 post error, 2 multi-bit ecc memory error 4.12.4.3 post error – Artesyn ATCA-7365 Installation and Use (May 2014) User Manual

Page 133: Table 4-33, Multi-bit ecc memory error event format, Table 4-34, Memory information definition, Bios

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BIOS

ATCA-7365 Installation and Use (6806800K65M)

133

4.12.4.2 Multi-bit ECC Memory Error

This event is generated from the runtime error logging module. See

Runtime Error Logging

on

page 125

.

4.12.4.3 POST Error

If an error has occured during the BIOS phase, a POST Error event is generated. There is only one
POST Error event per boot generated.

24-31

CPU Socket 0..1

Table 4-32 Memory Information Definition (continued)

Bit

Description

Table 4-33 Multi-bit ECC Memory Error Event Format

Offset

Name

Format

Description

00h

Event Type

BYTE

Event Type = 02h

01h

Length

BYTE

always 0Ch

02h-07h

Date/Time Fields

BYTE

These fields contain the BCD
representation of the date and time

08h-0Bh

Memory Information

UINT32

OEM extension

Table 4-34 Memory InformaTion Definition

Bit

Description

0-7

reserved

8-15

DIMM number per Channel 0..1

16-23

DIMM channel 0..2

24-31

CPU Socket 0..1