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4 fpga register mapping, 1 lpc i/o register map, Table 6-38 – Artesyn ATCA-7365 Installation and Use (May 2014) User Manual

Page 190: Divisor latch lsb register (dll), if dlab=1, Table 6-39, Divisor latch msb register (dlm), if dlab=1, Maps and registers

4 fpga register mapping, 1 lpc i/o register map, Table 6-38 | Divisor latch lsb register (dll), if dlab=1, Table 6-39, Divisor latch msb register (dlm), if dlab=1, Maps and registers | Artesyn ATCA-7365 Installation and Use (May 2014) User Manual | Page 190 / 300 4 fpga register mapping, 1 lpc i/o register map, Table 6-38 | Divisor latch lsb register (dll), if dlab=1, Table 6-39, Divisor latch msb register (dlm), if dlab=1, Maps and registers | Artesyn ATCA-7365 Installation and Use (May 2014) User Manual | Page 190 / 300
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