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5 fifo control register (fcr), Table 6-34, Fifo control register (fcr) – Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (June 2014) User Manual

Page 138: Maps and registers

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Maps and Registers

ATCA-7370/ATCA-7370-S Installation and Use (6806800P54F)

138

6.2.5.5

FIFO Control Register (FCR)

FCR is a write-only register that is located at the same address as the IIR (IIR is a read-only
register). FCR enables/disables the transmitter/receiver FIFOs, clears the transmitter/receiver
FIFOs, and sets the receiver FIFO trigger level.

FIFO mode: Transmit FIFO has
half or less than half data.

Reading the IIR Register (if
the source of the interrupt) or
writing to the Transmitter
FIFO.

0b0000

4

Modem
Status

Clear to Send, Data Set Ready,
Ring Indicator, Received Line
Signal Detect

Reading the modem status
register

Table 6-33 Interrupt Identification Register Decode (continued)

Interrupt
ID

Interrupt Set/Reset Function

3:0

Priority

Type

Source

Reset Control

Table 6-34 FIFO Control Register (FCR)

LPC IO Address: Base + 2

Bit Description

Default

Access

0

FIFO enable/disable:
1: Transmitter and Receiver FIFO enabled
0: FIFO disabled

0

LPC: w

1

Receiver FIFO reset:
1: Bytes in receiver FIFO and counter are
reset. Shift register is not reset (bit is self-
clearing)
0: No effect

0

LPC: w

2

Transmit FIFO reset:
1: Bytes in receiver FIFO and counter are
reset. Shift register is not reset (bit is self-
clearing)
0: No effect

0

LPC: w

3

Receiver/Transmitter ready. Not supported.

0

LPC: w

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