Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (June 2014) - Manual (Page 116)

Maps and Registers
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54F) 116
The following table list interrupt resources:
Table 6-1 Interrupt Source Signals List
Source Signal Description
IPMC NMI_N This is a FPGA register bit written by IPMC through SPI
bus to request a NMI interrupt to PCH. this register bit
can connect to GPIO3 of PCH to cause a PCH NMI
interrupt.
Thermal event VR12_0_HOT_N
VR12_1_HOT_N
CPU0_DIMMS_HOT_N
...... These thermal signals description please refer to
chapter 15: Thermal Management.
These thermal can be arranged into FPGA register. And
when one signal is assert and isn't masked, it can cause
a interrupt to IPMC or PCH. this feature can be
reserved, and some devices thermal management
maybe be through acquire mode to read its thermal
information, such as LM75.
Handle switch HDL_SW This signal route to IPMC interrupt to process board
insertion or removing event.
SoL I2C SoL_ALERT_N SoL message interrupt to IPMC
PCIE devices MSI PCIE endpoint Devices such as 82599, I350 use MSI in-
band interrupt mode.