1 pic (non-apic) d31:f0 interrupt mapping, Table 6-2, Non-apic (pic mode/8259 mode) interrupt mapping – Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (June 2014) User Manual
Page 117: Maps and registers

Maps and Registers
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54F)
117
6.1.1
PIC (Non-APIC) D31:F0 Interrupt Mapping
Table 6-2 Non-APIC (PIC mode/8259 Mode) Interrupt Mapping
8259 IRQ
Typical Interrupt Source
Interrupt Source
Master
0
Internal
8254 Counter 0, Timer 0
(HPET)
1
Keyboard
IRQ1 via SERIRQ
2
Internal
Slave 8259 INTR output
3
Serial Port A
IRQ3 via SERIRQ, PIRQ#
4
Serial Port B
IRQ4 via SERIRQ, PIRQ#
5
Parallel/Generic
IRQ5 via SERIRQ, PIRQ#
6
Floppy
IRQ6 via SERIRQ, PIRQ#
7
Parallel/Generic
IRQ7 via SERIRQ, PIRQ#
Slave
8
Internal RTC
Internal RTC, Timer 1
(HPET)
9
Generic
IRQ9 via SERIRQ, SCI,
TCO, or PIRQ#
10
Generic
IRQ10 via SERIRQ, SCI,
TCO, or PIRQ#
11
Generic
IRQ11 via SERIRQ, SCI,
TCO, or PIRQ# or Timer#2
(HPET)
12
PS/2 Mouse
IRQ12 via SERIRQ, SCI,
TCO, or PIRQ# or Timer#3
(HPET)
13
Internal
State Machine output
based on processor
FERR# assertion. May
optionally be used for SCI
or TCO interrupt if FERR#
not needed.