Altera Cyclone II DSP Development Board User Manual
Page 96

C–10
Reference Manual
Altera Corporation
Cyclone II DSP Development Board
August 2006
Introduction
DIMM_DQ4
Y16
E9
1.8V
DIMM_DQ40
B10
F1
PROTO_IO15
DIMM_DQ41
A10
F10
DIMM_DQ37
DIMM_DQ42
F12
F11
DIMM_DQ32
DIMM_DQ43
G11
F12
DIMM_DQ42
DIMM_DQ44
D10
F13
VREF
DIMM_DQ45
C10
F14
DIMM_DQ48
DIMM_DQ46
D12
F15
DIMM_DQ62
DIMM_DQ47
E12
F16
DIMM_DQ63
DIMM_DQ48
F14
F17
ADC_B_D0
DIMM_DQ49
D14
F18
ADC_B_D8
DIMM_DQ5
AD17
F19
GND_PLL
DIMM_DQ50
B16
F2
PROTO_IO13
DIMM_DQ51
G14
F20
USER_LED2
DIMM_DQ52
B11
F21
VGA_VSYNC
DIMM_DQ53
G13
F22
3.3V
DIMM_DQ54
B15
F23
EVM_BEN0
DIMM_DQ55
C15
F24
EVM_CLKX0
DIMM_DQ56
A18
F25
EVM_BEN2
DIMM_DQ57
B17
F26
EVM_A21
DIMM_DQ58
G16
F3
AUDIO_BCLK
DIMM_DQ59
G15
F4
PROTO_IO9
DIMM_DQ6
AF18
F5
3.3V
DIMM_DQ60
E15
F6
PROTO_IO3
DIMM_DQ61
A17
F7
ADC_A_OE
DIMM_DQ62
F15
F8
GND_PLL
DIMM_DQ63
F16
F9
DIMM_DQ68
DIMM_DQ64
G9
G1
PROTO_IO16
DIMM_DQ65
C4
G10
DIMM_DQ36
DIMM_DQ66
B5
G11
DIMM_DQ43
DIMM_DQ67
D7
G12
DIMM_DM6
DIMM_DQ68
F9
G13
DIMM_DQ53
Table C–1. Cyclone II EP2C70F672-C6ES FPGA Pin-Outs (Part 10 of 22)
Note (1)
Alphabetical by Signal Name
Alphabetical by Pin Number
Schematic Signal Name
Pin Number
Pin Number
Schematic Signal Name
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)