Altera Cyclone II DSP Development Board User Manual
Page 39
Altera Corporation
Reference Manual
2–31
August 2006
Cyclone II DSP Development Board
Cyclone II DSP Development Board Components
DIMM_DQ23
DIMM_DQ23
150
AF9
DIMM_DQ24
DIMM_DQ24
33
AB10
DIMM_DQ25
DIMM_DQ25
34
AA10
DIMM_DQ26
DIMM_DQ26
39
AE6
DIMM_DQ27
DIMM_DQ27
40
AE7
DIMM_DQ28
DIMM_DQ28
152
Y11
DIMM_DQ29
DIMM_DQ29
153
AA11
DIMM_DQ30
DIMM_DQ30
158
AF6
DIMM_DQ31
DIMM_DQ31
159
AA9
DIMM_DQ32
DIMM_DQ32
80
F11
DIMM_DQ33
DIMM_DQ33
81
D8
DIMM_DQ34
DIMM_DQ34
86
C8
DIMM_DQ35
DIMM_DQ35
87
D9
DIMM_DQ36
DIMM_DQ36
199
G10
DIMM_DQ37
DIMM_DQ37
200
F10
DIMM_DQ38
DIMM_DQ38
205
A7
DIMM_DQ39
DIMM_DQ39
206
C9
DIMM_DQ40
DIMM_DQ40
89
B10
DIMM_DQ41
DIMM_DQ41
90
A10
DIMM_DQ42
DIMM_DQ42
95
F12
DIMM_DQ43
DIMM_DQ43
96
G11
DIMM_DQ44
DIMM_DQ44
208
D10
DIMM_DQ45
DIMM_DQ45
209
C10
DIMM_DQ46
DIMM_DQ46
214
D12
DIMM_DQ47
DIMM_DQ47
215
E12
DIMM_DQ48
DIMM_DQ48
98
F14
DIMM_DQ49
DIMM_DQ49
99
D14
DIMM_DQ50
DIMM_DQ50
107
B16
DIMM_DQ51
DIMM_DQ51
108
G14
DIMM_DQ52
DIMM_DQ52
217
B11
DIMM_DQ53
DIMM_DQ53
218
G13
DIMM_DQ54
DIMM_DQ54
226
B15
Table 2–21. DDR2 SDRAM DIMM Pin-Outs (Part 3 of 8)
Note (1)
Cyclone II (U12)
Signal Name
(2)
DIMM (J8) Signal
Name
(2)
DIMM (J8) Pin
Number
Cyclone II (U12)
Pin Number
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)