Altera Cyclone II DSP Development Board User Manual
Page 94

C–8
Reference Manual
Altera Corporation
Cyclone II DSP Development Board
August 2006
Introduction
DIMM_A_R3
Y10
C21
USER_DIPSW2
DIMM_A_R4
AF5
C22
ADC_A_D12
DIMM_A_R5
AD7
C23
USER_DIPSW3
DIMM_A_R6
AC6
C24
EVM_A18
DIMM_A_R7
AB8
C25
EVM_A16
DIMM_A_R8
AD5
C26
3.3V
DIMM_A_R9
AE11
C3
PROTO_IO40
DIMM_BA_R0
Y18
C4
DIMM_DQ65
DIMM_BA_R1
AF23
C5
ADC_A_D0
DIMM_BA_R2
AB15
C6
ADC_A_D1
DIMM_CASN_R
AC22
C7
DIMM_DQ71
DIMM_CK_N0
AD19
C8
DIMM_DQ34
DIMM_CK_N1
AD21
C9
DIMM_DQ39
DIMM_CK_N2
AA20
D1
PROTO_IO14
DIMM_CK_P0
AC21
D10
DIMM_DQ44
DIMM_CK_P1
AB20
D11
VREF
DIMM_CK_P2
AD22
D12
DIMM_DQ46
DIMM_CKE_R0
AE21
D13
ADC_A_D7
DIMM_CKE_R1
AC19
D14
DIMM_DQ49
DIMM_CSN_R0
AF22
D15
ADC_A_OVR
DIMM_CSN_R1
AB18
D16
VREF
DIMM_DM0
AC15
D17
ADC_B_D1
DIMM_DM1
AA12
D18
ADC_B_D2
DIMM_DM2
AC9
D19
ADC_B_SEN
DIMM_DM3
AD8
D2
PROTO_IO29
DIMM_DM4
D6
D20
ADC_B_D13
DIMM_DM5
B9
D21
ADC_B_D12
DIMM_DM6
G12
D22
1.8V
DIMM_DM7
C16
D23
EVM_A14
DIMM_DM8
A4
D24
GND
DIMM_DQ0
AA16
D25
EVM_A12
DIMM_DQ1
AC17
D26
EVM_A10
Table C–1. Cyclone II EP2C70F672-C6ES FPGA Pin-Outs (Part 8 of 22)
Note (1)
Alphabetical by Signal Name
Alphabetical by Pin Number
Schematic Signal Name
Pin Number
Pin Number
Schematic Signal Name
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)