Altera V-Series Avalon-MM DMA User Manual
Page 55
Figure 4-9: Transceiver Bank and Hard IP for PCI Express IP Core Locations in Arria SX Devices
Ch5
Ch4
Ch3
Ch2
Ch1
Ch0
Ch5
Ch4
Ch3
Ch2
Ch1
Ch0
Ch5
Ch4
Ch3
Ch2
Ch1
Ch0
Ch2
Ch1
Ch0
9 Ch
F896
9 Ch
F1152
9 Ch
F1517
GXB_L2
GXB_L1
GXB_L0
GXB_R0
Note: Blue blocks are 6 Gbps channels.
4-24
Physical Layout of Hard IP In Arria V GX/GX/SX/ST Devices
UG-01154
2014.12.18
Altera Corporation
Interfaces and Signal Descriptions
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