Altera V-Series Avalon-MM DMA - Manual (Page 139)

Date Version Changes Made
• Corrected the name of the Descriptor Instructions bus. The letters
DMA are now Ast. For example
WrDMARXValid_i
is now
WrAstRXValid_i
.
• Added
RD_CONTROL
and
WR_CONTROL
register
Done
bit. When set,
the Descriptor Controller writes this bit for each descriptor in the
status table and sends a single MSI interrupt after the final
descriptor completes.
• Removed the following chapters that have minimal relevance to
the V-Series Avalon-MM DMA Interface IP Core. These chapters
are available in the more comprehensive Avalon-ST versions :
• Design Implementation
• Optional Features
• Debugging
• Throughput Optimization
2013.12.02 13.1 Arria 10
Initial release.
How to Contact Altera
To locate the most up-to-date information about Altera products, refer to the following table.
Contact (1) Contact Method Address
Technical support Website www.altera.com/support
Technical training
Website www.altera.com/training
Email [email protected]
Product literature Website www.altera.com/literature
Nontechnical support (general) Email [email protected]
(software licensing) Email [email protected]
Note to Table:
1. You can also contact your local Altera sales office or sales representative.
Related Information
• Technical Support
• Technical Training
• Customer Training
B-4 How to Contact Altera
UG-01154
2014.12.18
Altera Corporation Additional Information
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