Device identification registers, Pci express and pci capabilities parameters – Altera V-Series Avalon-MM DMA User Manual
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Device Identification Registers
Table 3-3: Device ID Registers
The following table lists the default values of the read-only Device ID registers. You can use the parameter editor
to change the values of these registers. Refer to Type 0 Configuration Space Registers for the layout of the Device
Identification registers.
Register Name
Range
Default Value
Description
Vendor ID
16 bits
0x00000000
Sets the read-only value of the
Vendor ID
register. This
parameter can not be set to 0xFFFF per the PCI Express
Specification.
Address offset: 0x000.
Device ID
16 bits
0x00000001
Sets the read-only value of the
Device ID
register.
Address offset: 0x000.
Revision ID
8 bits
0x00000001
Sets the read-only value of the
Revision ID
register.
Address offset: 0x008.
Class code
24 bits
0x00000000
Sets the read-only value of the
Class Code
register.
Address offset: 0x008.
Subsystem
Vendor ID
16 bits
0x00000000
Sets the read-only value of the
Subsystem Vendor ID
register in the PCI Type 0 Configuration Space. This
parameter cannot be set to 0xFFFF per the PCI Express
Base Specification. This value is assigned by PCI-SIG to
the device manufacturer.
Address offset: 0x02C.
Subsystem
Device ID
16 bits
0x00000000
Sets the read-only value of the
Subsystem Device ID
register in the PCI Type 0 Configuration Space.
Address offset: 0x02C
Related Information
PCI Express and PCI Capabilities Parameters
This group of parameters defines various capability properties of the IP core. Some of these parameters
are stored in the PCI Configuration Space - PCI Compatible Configuration Space. The byte offset
indicates the parameter address.
3-6
Device Identification Registers
UG-01154
2014.12.18
Altera Corporation
Parameter Settings