Altera V-Series Avalon-MM DMA - Manual (Page 16)

plan to replace the Descriptor Controller IP core with your own implementation, do not turn on the
Instantiate internal descriptor controller in the parameter editor when parameterizing the IP core.
Transceiver Reconfiguration Controller IP Core
The Transceiver Reconfiguration Controller performs offset cancellation to compensate for variations due
to process, voltage, and temperature (PVT).
The following provides a high-level block diagram of the V-Series Avalon-MM DMA for PCI Express
Design Example.
Altera PCIe Reconfig Driver IP Core
The PCIe Reconfig Driver drives the Transceiver Reconfiguration Controller. This driver is a plain text
Verilog HDL file that you can modify if necessary to meet your system requirements.
Block Diagram of the Avalon-MM DMA for PCI Express Example Design
Transaction,
Data Link,
and PHY
Layers
On-Chip
Memory
DMA Data
Descriptor
Controller
Qsys System Design V-Series Avalon-MM DMA for PCI Express
PCIe Link
Gen3 x8
DMA Engine
Avalon-MM to
PCIe TLP
Bridge
V-Series Avalon-MM DMA for PCI Express
Altera PCIe
Reconfig
Driver
Transceiver
Reconfiguration
Controller
In
ter
connec
t
Related Information
• V-Series Avalon-MM DMA for PCI Express on page 8-8
• DMA Descriptor Controller Registers on page 5-15
Generating the Testbench
1. Copy the example design, pcie_de_ep_dma_g3x8_integrated.qsys, from the installation directory:
/ip/altera/altera_pcie/altera_pcie_hip_256_avmm/example_design/ to your working directory.
2. Start Qsys, by typing the following command:
2-2 Generating the Testbench
UG-01154
2014.12.18
Altera Corporation Getting Started with the Avalon-MM DMA
Send Feedback