HP Integrity rx4610 Server - Manual (Page 189)

Chapter 11 Troubleshooting
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Table 11-2. First Row Detection Order
Order Row Board DIMM
1 C Upper 5-8
2 D Upper 13-16
3 E Upper 21-24
4 F Upper 29-32
5 8 Upper 1-4
6 9 Upper 9-12
7 A Upper 17-20
8 B Upper 25-28
9 4 Lower 5-8
10 5 Lower 13-16
11 6 Lower 21-24
12 7 Lower 29-32
13 0 Lower 1-4
14 1 Lower 9-12
15 2 Lower 17-20
16 3 Lower 25-28
Upon completion of the first row memory test, the memory testing continues with
the base memory test.
If the first row test fails, there are several possible failing cases. Two failing
scenarios are described in the following sections.
Case 1
The first row memory test encounters a MBE (Multi Bit Error) in the first
populated row of memory configured. Irrespective of the number of DIMMs
populated in the system, if the first row test encounters a MBE, the BIOS will
display an error message on the front panel LCD and halt the system.
User Notification
This memory test occurs during POST and prior to video sync. Therefore, any
error found during this test will result in the following message displayed on the
LCD panel.
“First row test”
“Failed, sys halt”