Epson S1C63000 - Manual (Page 92)

86 EPSON S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
CMP [%ir],%r
CMP [%ir]+,%r Compare location [ir reg.] with r reg. and increment ir reg. 1 cycle
Function: [ir] - r, ir
←
ir + 1
Subtracts the content of the r register (A or B) from the content of the data memory addressed
by the ir register (X or Y). It changes the flags (Z and C), but does not change the content of the
memory. Then increments the ir register (X or Y). The increment result of the ir register does
not affect the flags.
Code: Mnemonic MSB LSB
CMP [%X]+,%A 1 1 1 1 0 0 1 1 0 1 0 0 1 1E69H
CMP [%X]+,%B 1 1 1 1 0 0 1 1 0 1 1 0 1 1E6DH
CMP [%Y]+,%A 1 1 1 1 0 0 1 1 0 1 0 1 1 1E6BH
CMP [%Y]+,%B 1 1 1 1 0 0 1 1 0 1 1 1 1 1E6FH
Flags: E I C Z
↓
– ↕ ↕
Mode: Src: Register direct
Dst: Register indirect
Extended addressing: Invalid
Compare location [ir reg.] with r reg. 1 cycle
Function: [ir] - r
Subtracts the content of the r register (A or B) from the content of the data memory addressed
by the ir register (X or Y). It changes the flags (Z and C), but does not change the content of the
memory.
Code: Mnemonic MSB LSB
CMP [%X],%A 1 1 1 1 0 0 1 1 0 1 0 0 0 1E68H
CMP [%X],%B 1 1 1 1 0 0 1 1 0 1 1 0 0 1E6CH
CMP [%Y],%A 1 1 1 1 0 0 1 1 0 1 0 1 0 1E6AH
CMP [%Y],%B 1 1 1 1 0 0 1 1 0 1 1 1 0 1E6EH
Flags: E I C Z
↓
– ↕ ↕
Mode: Src: Register direct
Dst: Register indirect
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: CMP [%X],%r [00imm8] - r (00imm8 = 0000H + 00H to FFH)
LDB %EXT,imm8
CMP [%Y],%r [FFimm8] - r (FFimm8 = FF00H + 00H to FFH)