Or [%ir]+,%r, Or [%ir],imm4 – Epson S1C63000 User Manual
Page 121
S1C63000 CORE CPU MANUAL
EPSON
115
CHAPTER 4: INSTRUCTION SET
OR [%ir]+,%r
Logical OR of r reg. and location [ir reg.] and increment ir reg.
2 cycles
Function:
[ir]
←
[ir]
∨
r, ir
←
ir +1
Performs a logical OR operation of the content of the r register (A or B) and the content of the
data memory addressed by the ir register (X or Y), and stores the result in that address. Then
increments the ir register (X or Y). The flags change due to the operation result of the data
memory and the increment result of the ir register does not affect the flags.
Code:
Mnemonic
MSB
LSB
OR [%X]+,%A
1
1
0
1
1
0
1
1
0
1
0
0
1
1B69H
OR [%X]+,%B
1
1
0
1
1
0
1
1
0
1
1
0
1
1B6DH
OR [%Y]+,%A
1
1
0
1
1
0
1
1
0
1
0
1
1
1B6BH
OR [%Y]+,%B
1
1
0
1
1
0
1
1
0
1
1
1
1
1B6FH
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Register direct
Dst: Register indirect
Extended addressing: Invalid
OR [%ir],imm4
Logical OR of immediate data imm4 and location [ir reg.]
2 cycles
Function:
[ir]
←
[ir]
∨
imm4
Performs a logical OR operation of the 4-bit immediate data imm4 and the content of the data
memory addressed by the ir register (X or Y), and stores the result in that address.
Code:
Mnemonic
MSB
LSB
OR [%X],imm4
1
1
0
1
1
0
0
0
0 i3 i2 i1 i0
1B00H–1B0FH
OR [%Y],imm4
1
1
0
1
1
0
0
1
0 i3 i2 i1 i0
1B20H–1B2FH
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Immediate data
Dst: Register indirect
Extended addressing: Valid
Extended
LDB
%EXT,imm8
operation:
OR
[%X],imm4
[00imm8]
←
[00imm8]
∨
imm4 (00imm8 = 0000H + 00H to FFH)
LDB
%EXT,imm8
OR
[%Y],imm4
[FFimm8]
←
[FFimm8]
∨
imm4 (FFimm8 = FF00H + 00H to FFH)