Xor %r,[%ir – Epson S1C63000 User Manual
Page 147
S1C63000 CORE CPU MANUAL
EPSON
141
CHAPTER 4: INSTRUCTION SET
XOR %r,[%ir]
Exclusive OR location [ir reg.] and r reg.
1 cycle
Function:
r
←
r
∀
[ir]
Performs an exclusive OR operation of the content of the data memory addressed by the ir
register (X or Y) and the content of the r register (A or B), and stores the result in the r register.
Code:
Mnemonic
MSB
LSB
XOR %A,[%X]
1
1
0
1
1
1
1
1
0
0
0
0
0
1BE0H
XOR %A,[%Y]
1
1
0
1
1
1
1
1
0
0
0
1
0
1BE2H
XOR %B,[%X]
1
1
0
1
1
1
1
1
0
0
1
0
0
1BE4H
XOR %B,[%Y]
1
1
0
1
1
1
1
1
0
0
1
1
0
1BE6H
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Register indirect
Dst: Register direct
Extended addressing: Valid
Extended
LDB
%EXT,imm8
operation:
XOR
%r,[%X]
r
←
r
∀
[00imm8] (00imm8 = 0000H + 00H to FFH)
LDB
%EXT,imm8
XOR
%r,[%Y]
r
←
r
∀
[FFimm8] (FFimm8 = FF00H + 00H to FFH)
XOR %r,[%ir]+
Exclusive OR location [ir reg.] and r reg. and increment ir reg.
1 cycle
Function:
r
←
r
∀
[ir], ir
←
ir + 1
Performs an exclusive OR operation of the content of the data memory addressed by the ir
register (X or Y) and the content of the r register (A or B), and stores the result in the r register.
Then increments the ir register (X or Y). The flags change due to the operation result of the r
register and the increment result of the ir register does not affect the flags.
Code:
Mnemonic
MSB
LSB
XOR %A,[%X]+
1
1
0
1
1
1
1
1
0
0
0
0
1
1BE1H
XOR %A,[%Y]+
1
1
0
1
1
1
1
1
0
0
0
1
1
1BE3H
XOR %B,[%X]+
1
1
0
1
1
1
1
1
0
0
1
0
1
1BE5H
XOR %B,[%Y]+
1
1
0
1
1
1
1
1
0
0
1
1
1
1BE7H
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Register indirect
Dst: Register direct
Extended addressing: Invalid