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Xor %r,imm4, Xor %f,imm4 – Epson S1C63000 User Manual

Page 146

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EPSON

S1C63000 CORE CPU MANUAL

CHAPTER 4: INSTRUCTION SET

XOR %r,imm4

Exclusive OR immediate data imm4 and r reg.

1 cycle

Function:

r

r

imm4

Performs an exclusive OR operation of the 4-bit immediate data imm4 and the content of the r
register (A or B), and stores the result in the r register.

Code:

Mnemonic

MSB

LSB

XOR %A,imm4

1

1

0

1

1

1

1

0

0 i3 i2 i1 i0

1BC0H–1BCFH

XOR %B,imm4

1

1

0

1

1

1

1

0

1 i3 i2 i1 i0

1BD0H–1BDFH

Flags:

E

I

C

Z

Mode:

Src: Immediate data
Dst: Register direct
Extended addressing: Invalid

XOR %F,imm4

Exclusive OR immediate data imm4 and F reg.

1 cycle

Function:

F

F

imm4

Performs an exclusive OR operation of the 4-bit immediate data imm4 and the content of the F
(flag) register, and stores the result in the r register. It is possible to set/reset any flag.

Code:

Mnemonic

MSB

LSB

XOR %F,imm4

1

0

0

0

0

1

0

1

0 i3 i2 i1 i0

10A0H–10AFH

Flags:

E

I

C

Z

Mode:

Src: Immediate data
Dst: Register direct
Extended addressing: Invalid