2 architecture, 1 alu and registers, 1 alu – Epson S1C63000 User Manual
Page 10: 2 register configuration, Chapter, Rchitecture
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EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 2: ARCHITECTURE
CHAPTER
2 A
RCHITECTURE
This chapter explains the S1C63000 ALU, registers, configuration of the program memory area and
data memory area, and addressing.
2.1 ALU and Registers
2.1.1 ALU
The ALU (Arithmetic and Logic Unit) loads 4-bit data from a memory or a register and operates the data
according to the instruction. Table 2.1.1.1 shows the ALU operation functions.
Table 2.1.1.1 ALU operation functions
Fig. 2.1.2.1 Register configuration
The operation result is stored to a register or memory according to the instruction.
In addition, the Z (zero) flag and C (carry) flag are set/reset according to the operation result.
2.1.2 Register configuration
Figure 2.1.2.1 shows the register configuration of the S1C63000.
Function classification
Arithmetic
Logic
Rotate / shift
Mnemonic
Operation
Addition
Addition with carry
Subtraction
Subtraction with carry
Comparison
Increment (adds 1)
Decrement (subtracts 1)
Logical product
Logical sum
Exclusive OR
Bit test
Bit clear
Bit set
Bit test
Rotate to left with carry
Rotate to right with carry
Logical shift to left
Logical shift to right
ADD
ADC
SUB
SBC
CMP
INC
DEC
AND
OR
XOR
BIT
CLR
SET
TST
RL
RR
SLL
SRL
PC
15
0
X
15
0
XH
7
0
XL
0 7
Y
15
0
YH
7
0
YL
0 7
0
SP1
7
0
0
0
0
0
0
0
0
0
SP2
7
00H
0
EXT
7
BA
7
0
B
3
0
A
0 3
F
3
0
Z
C
I
E
Program counter
Index register X
Index register Y
Queue register
Stack pointer 1
Stack pointer 2
Extension register
Data register B & A
Flag register
QUEUE
15
0