Inc %sp int imm6 – Epson S1C63000 User Manual
Page 100
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EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
INC %sp
INT imm6
Software interrupt
3 cycles
Function:
[SP2-1]
←
F, SP2
←
SP2 - 1, ([(SP1-1)*4+3]~[(SP1-1)*4])
←
PC + 1, SP1
←
SP1 - 1, PC
←
imm6
(imm6 = 0100H–013FH)
Saves the content of the F register and the return address (this instruction address + 1) to the
stack, then executes the software interrupt routine that starts from the vector address (0100H–
013FH) specified by the imm6.
Code:
Mnemonic
MSB
LSB
INT imm6
1
1
1
1
1
1
0 i5 i4 i3 i2 i1 i0
1F80H–1FBFH
Flags:
E
I
C
Z
↓
–
–
–
Mode:
Immediate data
Extended addressing: Invalid
Note:
The RETI instruction, which returns the content of the F register, should be used for returning
from the interrupt routine that is executed by this instruction.
Increment stack pointer
1 cycle
Function:
sp
←
sp + 1
Increments (+1) the content of the stack pointer sp (SP1 or SP2). This instruction does not
change the C flag regardless of the operation result.
Code:
Mnemonic
MSB
LSB
INC %SP1
1
1
1
1
1
1
1
1
0
1
0
0
0
1FE8H
INC %SP2
1
1
1
1
1
1
1
1
0
1
1
0
0
1FECH
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Register direct
Extended addressing: Invalid