Alu alithmetic operation (1/3) – Epson S1C63000 User Manual
Page 47
S1C63000 CORE CPU MANUAL
EPSON
41
CHAPTER 4: INSTRUCTION SET
ADD
%A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
ADD
%B,%A
%B,%B
%B,imm4
%B,[%X]
%B,[%X]+
%B,[%Y]
%B,[%Y]+
ADD
[%X],%A
[%X],%B
[%X],imm4
[%X]+,%A
[%X]+,%B
[%X]+,imm4
ADD
[%Y],%A
[%Y],%B
[%Y],imm4
[%Y]+,%A
[%Y]+,%B
[%Y]+,imm4
ADC
%A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
ADC
%B,%A
%B,%B
%B,imm4
%B,[%X]
%B,[%X]+
%B,[%Y]
%B,[%Y]+
ADC
[%X],%A
[%X],%B
[%X],imm4
[%X]+,%A
[%X]+,%B
[%X]+,imm4
ADC
[%Y],%A
[%Y],%B
[%Y],imm4
[%Y]+,%A
[%Y]+,%B
[%Y]+,imm4
SUB
%A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
1 1 0 0 1 0 1 1 1 0 0 0 X
1 1 0 0 1 0 1 1 1 0 0 1 X
1 1 0 0 1 0 1 0 0 i3 i2 i1 i0
1 1 0 0 1 0 1 1 0 0 0 0 0
1 1 0 0 1 0 1 1 0 0 0 0 1
1 1 0 0 1 0 1 1 0 0 0 1 0
1 1 0 0 1 0 1 1 0 0 0 1 1
1 1 0 0 1 0 1 1 1 0 1 0 X
1 1 0 0 1 0 1 1 1 0 1 1 X
1 1 0 0 1 0 1 0 1 i3 i2 i1 i0
1 1 0 0 1 0 1 1 0 0 1 0 0
1 1 0 0 1 0 1 1 0 0 1 0 1
1 1 0 0 1 0 1 1 0 0 1 1 0
1 1 0 0 1 0 1 1 0 0 1 1 1
1 1 0 0 1 0 1 1 0 1 0 0 0
1 1 0 0 1 0 1 1 0 1 1 0 0
1 1 0 0 1 0 0 0 0 i3 i2 i1 i0
1 1 0 0 1 0 1 1 0 1 0 0 1
1 1 0 0 1 0 1 1 0 1 1 0 1
1 1 0 0 1 0 0 0 1 i3 i2 i1 i0
1 1 0 0 1 0 1 1 0 1 0 1 0
1 1 0 0 1 0 1 1 0 1 1 1 0
1 1 0 0 1 0 0 1 0 i3 i2 i1 i0
1 1 0 0 1 0 1 1 0 1 0 1 1
1 1 0 0 1 0 1 1 0 1 1 1 1
1 1 0 0 1 0 0 1 1 i3 i2 i1 i0
1 1 0 0 1 1 1 1 1 0 0 0 X
1 1 0 0 1 1 1 1 1 0 0 1 X
1 1 0 0 1 1 1 0 0 i3 i2 i1 i0
1 1 0 0 1 1 1 1 0 0 0 0 0
1 1 0 0 1 1 1 1 0 0 0 0 1
1 1 0 0 1 1 1 1 0 0 0 1 0
1 1 0 0 1 1 1 1 0 0 0 1 1
1 1 0 0 1 1 1 1 1 0 1 0 X
1 1 0 0 1 1 1 1 1 0 1 1 X
1 1 0 0 1 1 1 0 1 i3 i2 i1 i0
1 1 0 0 1 1 1 1 0 0 1 0 0
1 1 0 0 1 1 1 1 0 0 1 0 1
1 1 0 0 1 1 1 1 0 0 1 1 0
1 1 0 0 1 1 1 1 0 0 1 1 1
1 1 0 0 1 1 1 1 0 1 0 0 0
1 1 0 0 1 1 1 1 0 1 1 0 0
1 1 0 0 1 1 0 0 0 i3 i2 i1 i0
1 1 0 0 1 1 1 1 0 1 0 0 1
1 1 0 0 1 1 1 1 0 1 1 0 1
1 1 0 0 1 1 0 0 1 i3 i2 i1 i0
1 1 0 0 1 1 1 1 0 1 0 1 0
1 1 0 0 1 1 1 1 0 1 1 1 0
1 1 0 0 1 1 0 1 0 i3 i2 i1 i0
1 1 0 0 1 1 1 1 0 1 0 1 1
1 1 0 0 1 1 1 1 0 1 1 1 1
1 1 0 0 1 1 0 1 1 i3 i2 i1 i0
1 1 0 0 0 0 1 1 1 0 0 0 X
1 1 0 0 0 0 1 1 1 0 0 1 X
1 1 0 0 0 0 1 0 0 i3 i2 i1 i0
1 1 0 0 0 0 1 1 0 0 0 0 0
1 1 0 0 0 0 1 1 0 0 0 0 1
1 1 0 0 0 0 1 1 0 0 0 1 0
1 1 0 0 0 0 1 1 0 0 0 1 1
1
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Ч
1
↓
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Ч
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
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●
1
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Ч
2
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2
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2
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2
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Ч
2
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2
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2
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2
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2
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2
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Ч
2
↓
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Ч
2
↓
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Ч
1
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–
Ч
1
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–
Ч
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
2
↓
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●
2
↓
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2
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2
↓
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Ч
2
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Ч
2
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Ч
2
↓
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●
2
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2
↓
–
●
2
↓
–
Ч
2
↓
–
Ч
2
↓
–
Ч
1
↓
–
↓ ↑
Ч
1
↓
–
Ч
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
1
↓
–
●
1
↓
–
Ч
A
←
A+A
A
←
A+B
A
←
A+imm4
A
←
A+[X]
A
←
A+[X], X
←
X+1
A
←
A+[Y]
A
←
A+[Y], Y
←
Y+1
B
←
B+A
B
←
B+B
B
←
B+imm4
B
←
B+[X]
B
←
B+[X], X
←
X+1
B
←
B+[Y]
B
←
B+[Y], Y
←
Y+1
[X]
←
[X]+A
[X]
←
[X]+B
[X]
←
[X]+imm4
[X]
←
[X]+A, X
←
X+1
[X]
←
[X]+B, X
←
X+1
[X]
←
[X]+imm4, X
←
X+1
[Y]
←
[Y]+A
[Y]
←
[Y]+B
[Y]
←
[Y]+imm4
[Y]
←
[Y]+A, Y
←
Y+1
[Y]
←
[Y]+B, Y
←
Y+1
[Y]
←
[Y]+imm4, Y
←
Y+1
A
←
A+A+C
A
←
A+B+C
A
←
A+imm4+C
A
←
A+[X]+C
A
←
A+[X]+C, X
←
X+1
A
←
A+[Y]+C
A
←
A+[Y]+C, Y
←
Y+1
B
←
B+A+C
B
←
B+B+C
B
←
B+imm4+C
B
←
B+[X]+C
B
←
B+[X]+C, X
←
X+1
B
←
B+[Y]+C
B
←
B+[Y]+C, Y
←
Y+1
[X]
←
[X]+A+C
[X]
←
[X]+B+C
[X]
←
[X]+imm4+C
[X]
←
[X]+A+C, X
←
X+1
[X]
←
[X]+B+C, X
←
X+1
[X]
←
[X]+imm4+C, X
←
X+1
[Y]
←
[Y]+A+C
[Y]
←
[Y]+B+C
[Y]
←
[Y]+imm4+C
[Y]
←
[Y]+A+C, Y
←
Y+1
[Y]
←
[Y]+B+C, Y
←
Y+1
[Y]
←
[Y]+imm4+C, Y
←
Y+1
A
←
A-A
A
←
A-B
A
←
A-imm4
A
←
A-[X]
A
←
A-[X], X
←
X+1
A
←
A-[Y]
A
←
A-[Y], Y
←
Y+1
68
68
69
69
70
69
70
68
68
69
69
70
69
70
70
70
71
71
71
72
70
70
71
71
71
72
61
61
61
62
62
62
62
61
61
61
62
62
62
62
63
63
64
63
63
64
63
63
64
63
63
64
135
135
135
136
136
136
136
Mnemonic
Machine code
Operation
Cycle
Page
Flag
EXT.
mode
12
E I C Z
11 10 9 8 7 6 5 4 3 2 1 0
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ALU alithmetic operation (1/3)
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