Epson S1C63000 - Manual (Page 71)

S1C63000 CORE CPU MANUAL EPSON 65
CHAPTER 4: INSTRUCTION SET
ADC %B,%A,n4 Add with carry A reg. to B reg. in specified radix 2 cycles
Function: B
←
N's adjust (B + A + C)
Adds the content of the A register and carry (C) to the B register. The operation result is
adjusted with n4 as the radix. The C flag is set by a carry according to the radix.
Code: Mnemonic MSB LSB
ADC %B,%A,n4 1 0 0 0 0 1 1 0 1 [10H-n4] 10D0H–10DFH
Flags: E I C Z
↓
– ↕ ↕
Mode: Src: Register direct
Dst: Register direct
Extended addressing: Invalid
Note: n4 should be specified with a value from 1 to 16.
ADC %B,[%ir],n4 Add with carry location [ir reg.] to B reg. in specified radix 2 cycles
Function: B
←
N's adjust (B + [ir] + C)
Adds the content of the data memory addressed by the ir register (X or Y) and carry (C) to the
B register. The operation result is adjusted with n4 as the radix. The C flag is set by a carry
according to the radix.
Code: Mnemonic MSB LSB
ADC %B,[%X],n4 1 1 1 0 1 1 1 0 0 [10H-n4] 1DC0H–1DCFH
ADC %B,[%Y],n4 1 1 1 0 1 1 1 1 0 [10H-n4] 1DE0H–1DEFH
Flags: E I C Z
↓
– ↕ ↕
Mode: Src: Register indirect
Dst: Register direct
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: ADC %B,[%X],n4 B
←
N’s adjust (B + [00imm8] + C) (00imm8 = 0000H + 00H to FFH)
LDB %EXT,imm8
ADC %B,[%Y],n4 B
←
N’s adjust (B + [FFimm8] + C) (FFimm8 = FF00H + 00H to FFH)
Note: n4 should be specified with a value from 1 to 16.