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Pop %ir push %r – Epson S1C63000 User Manual

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S1C63000 CORE CPU MANUAL

EPSON

117

CHAPTER 4: INSTRUCTION SET

POP %ir

PUSH %r

Push r reg. onto stack

1 cycle

Function:

[SP2-1]

r, SP2

SP2 -1

Decrements the stack pointer SP2, then stores the content of the r register (A, B or F) into the
address indicated by the SP2.

Code:

Mnemonic

MSB

LSB

PUSH %A

1

1

1

1

1

1

1

1

0

0

1

1

1

1FE7H

PUSH %B

1

1

1

1

1

1

1

1

0

0

1

1

0

1FE6H

PUSH %F

1

1

1

1

1

1

1

1

0

0

1

0

1

1FE5H

Flags:

E

I

C

Z

Mode:

Register direct
Extended addressing: Invalid

Pop top of stack into ir reg.

1 cycle

Function:

ir

([SP1*4+3]~[SP1*4]), SP1

SP1 +1

Loads the 16-bit data that has been stored in the addresses (4 words) indicated by the stack
pointer SP1 (SP1 indicates the lowest address) into the ir register (X or Y), then increments the
SP1.

Code:

Mnemonic

MSB

LSB

POP %X

1

1

1

1

1

1

1

1

0

1

0

0

1

1FE9H

POP %Y

1

1

1

1

1

1

1

1

0

1

0

1

X

1FEAH, (1FEBH)

Flags:

E

I

C

Z

Mode:

Register direct
Extended addressing: Invalid