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Epson S1C63000 User Manual

Page 59

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S1C63000 CORE CPU MANUAL

EPSON

53

CHAPTER 4: INSTRUCTION SET

RETI

RETS

RL

%A

%B

[%X]

[%X]+

[%Y]

[%Y]+

RR

%A

%B

[%X]

[%X]+

[%Y]

[%Y]+

SBC

%A,%A

%A,%B

%A,imm4

%A,[%X]

%A,[%X]+

%A,[%Y]

%A,[%Y]+

%B,%A

%B,%A,n4

%B,%B

%B,imm4

%B,[%X]

%B,[%X],n4

%B,[%X]+

%B,[%X]+,n4

%B,[%Y]

%B,[%Y],n4

%B,[%Y]+

%B,[%Y]+,n4

[%X],%A

[%X],%B

[%X],%B,n4

[%X],imm4

[%X],0,n4

[%X]+,%A

[%X]+,%B

[%X]+,%B,n4

[%X]+,imm4

[%X]+,0,n4

[%Y],%A

[%Y],%B

[%Y],%B,n4

[%Y],imm4

[%Y],0,n4

[%Y]+,%A

[%Y]+,%B

[%Y]+,%B,n4

[%Y]+,imm4

[%Y]+,0,n4

SET

[00addr6],imm2

[FFaddr6],imm2

SLL

%A

%B

1 1 1 1 1 1 1 1 1 1 0 0 1

1 1 1 1 1 1 1 1 1 1 0 1 1

1 0 0 0 0 1 1 1 1 0 0 1 0

1 0 0 0 0 1 1 1 1 0 1 1 0

1 0 0 0 0 1 1 1 0 1 0 0 0

1 0 0 0 0 1 1 1 0 1 0 0 1

1 0 0 0 0 1 1 1 0 1 0 1 0

1 0 0 0 0 1 1 1 0 1 0 1 1

1 0 0 0 0 1 1 1 1 0 0 1 1

1 0 0 0 0 1 1 1 1 0 1 1 1

1 0 0 0 0 1 1 1 0 1 1 0 0

1 0 0 0 0 1 1 1 0 1 1 0 1

1 0 0 0 0 1 1 1 0 1 1 1 0

1 0 0 0 0 1 1 1 0 1 1 1 1

1 1 0 0 0 1 1 1 1 0 0 0 X

1 1 0 0 0 1 1 1 1 0 0 1 X

1 1 0 0 0 1 1 0 0 i3 i2 i1 i0

1 1 0 0 0 1 1 1 0 0 0 0 0

1 1 0 0 0 1 1 1 0 0 0 0 1

1 1 0 0 0 1 1 1 0 0 0 1 0

1 1 0 0 0 1 1 1 0 0 0 1 1

1 1 0 0 0 1 1 1 1 0 1 0 X

1 0 0 0 0 1 1 0 0 n3 n2 n1 n0

1 1 0 0 0 1 1 1 1 0 1 1 X

1 1 0 0 0 1 1 0 1 i3 i2 i1 i0

1 1 0 0 0 1 1 1 0 0 1 0 0

1 1 1 0 0 1 1 0 0 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 0 1 0 1

1 1 1 0 0 1 1 0 1 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 0 1 1 0

1 1 1 0 0 1 1 1 0 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 0 1 1 1

1 1 1 0 0 1 1 1 1 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 1 0 0 0

1 1 0 0 0 1 1 1 0 1 1 0 0

1 1 1 0 0 0 1 0 0 n3 n2 n1 n0

1 1 0 0 0 1 0 0 0 i3 i2 i1 i0

1 1 1 0 0 0 0 0 0 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 1 0 0 1

1 1 0 0 0 1 1 1 0 1 1 0 1

1 1 1 0 0 0 1 0 1 n3 n2 n1 n0

1 1 0 0 0 1 0 0 1 i3 i2 i1 i0

1 1 1 0 0 0 0 0 1 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 1 0 1 0

1 1 0 0 0 1 1 1 0 1 1 1 0

1 1 1 0 0 0 1 1 0 n3 n2 n1 n0

1 1 0 0 0 1 0 1 0 i3 i2 i1 i0

1 1 1 0 0 0 0 1 0 n3 n2 n1 n0

1 1 0 0 0 1 1 1 0 1 0 1 1

1 1 0 0 0 1 1 1 0 1 1 1 1

1 1 1 0 0 0 1 1 1 n3 n2 n1 n0

1 1 0 0 0 1 0 1 1 i3 i2 i1 i0

1 1 1 0 0 0 0 1 1 n3 n2 n1 n0

1 0 1 1 0 i1 i0 a5 a4 a3 a2 a1 a0

1 0 1 1 1 i1 i0 a5 a4 a3 a2 a1 a0

1 0 0 0 0 1 1 1 1 0 0 0 0

1 0 0 0 0 1 1 1 1 0 1 0 0

2

Ч

2

– – –

Ч

1

Ч

1

Ч

2

2

Ч

2

2

Ч

1

Ч

1

Ч

2

2

Ч

2

2

Ч

1

Ч

1

Ч

1

Ч

1

1

Ч

1

1

Ч

1

Ч

2

Ч

1

Ч

1

Ч

1

2

1

Ч

2

Ч

1

2

1

Ч

2

Ч

2

2

2

2

2

2

Ч

2

Ч

2

Ч

2

Ч

2

Ч

2

2

2

2

2

2

Ч

2

Ч

2

Ч

2

Ч

2

Ч

2

– –

Ч

2

– –

Ч

1

Ч

1

Ч


PC

([SP1

4+3]~[SP1

4]), SP1

SP1+1

F

[SP2], SP2

SP2+1

PC

([SP1

4+3]~[SP1

4]), SP1

SP1+1

PC

PC+1

A (C

D3

D2

D1

D0

C)

B (C

D3

D2

D1

D0

C)

[X] (C

D3

D2

D1

D0

C)

[X] (C

D3

D2

D1

D0

C), X

X+1

[Y] (C

D3

D2

D1

D0

C)

[Y] (C

D3

D2

D1

D0

C), Y

Y+1

A (C

D3

D2

D1

D0

C)

B (C

D3

D2

D1

D0

C)

[X] (C

D3

D2

D1

D0

C)

[X] (C

D3

D2

D1

D0

C), X

X+1

[Y] (C

D3

D2

D1

D0

C)

[Y] (C

D3

D2

D1

D0

C), Y

Y+1

A

A-A-C

A

A-B-C

A

A-imm4-C

A

A-[X]-C

A

A-[X]-C, X

X+1

A

A-[Y]-C

A

A-[Y]-C, Y

Y+1

B

B-A-C

B

N's adjust (B-A-C)

B

B-B-C

B

B-imm4-C

B

B-[X]-C

B

N's adjust (B-[X]-C)

B

B-[X]-C, X

X+1

B

N's adjust (B-[X]-C), X

X+1

B

B-[Y]-C

B

N's adjust (B-[Y]-C)

B

B-[Y]-C, Y

Y+1

B

N's adjust (B-[Y]-C), Y

Y+1

[X]

[X]-A-C

[X]

[X]-B-C

[X]

N's adjust ([X]-B-C)

[X]

[X]-imm4-C

[X]

N's adjust ([X]-0-C)

[X]

[X]-A-C, X

X+1

[X]

[X]-B-C, X

X+1

[X]

N's adjust ([X]-B-C), X

X+1

[X]

[X]-imm4-C, X

X+1

[X]

N's adjust ([X]-0-C), X

X+1

[Y]

[Y]-A-C

[Y]

[Y]-B-C

[Y]

N's adjust ([Y]-B-C)

[Y]

[Y]-imm4-C

[Y]

N's adjust ([Y]-0-C)

[Y]

[Y]-A-C, Y

Y+1

[Y]

[Y]-B-C, Y

Y+1

[Y]

N's adjust ([Y]-B-C), Y

Y+1

[Y]

[Y]-imm4-C, Y

Y+1

[Y]

N's adjust ([Y]-0-C), Y

Y+1

[00addr6]

[00addr6]

(2

imm2

)

[FFaddr6]

[FFaddr6]

(2

imm2

)

A (C

D3

D2

D1

D0

0)

B (C

D3

D2

D1

D0

0)

Mnemonic

Machine code

Operation

Cycle

Page

Flag

EXT.

mode

12

E I C Z

11 10 9 8 7 6 5 4 3 2 1 0

↔ ↔ ↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔

↔ ↔
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↔ ↔
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↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔
↔ ↔

↔ ↔
↔ ↔

119

120

120

120

121

121

121

121

122

122

122

123

122

123

123

123

124

124

125

124

125

123

127

123

124

124

128

125

128

124

128

125

128

125

125

129

126

130

126

126

129

127

130

125

125

129

126

130

126

126

130

127

130

131

131

131

131