Epson S1C63000 - Manual (Page 112)

106 EPSON S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
LDB %BA,[%ir]+ Load location [ir reg.] into BA reg. and increment ir reg. 2 cycles
Function: A
←
[ir], B
←
[ir + 1], ir
←
ir + 2
Loads the 2-word data in the data memory into the BA register. The content of the data
memory addressed by the ir register (X or Y) is loaded into the A register as the low-order 4
bits, and the content of the next address is loaded into the B register as the high-order 4 bits.
The ir register (X or Y) is incremented by 2 words.
Code: Mnemonic MSB LSB
LDB %BA,[%X]+ 1 1 1 1 1 1 1 0 1 1 0 0 0 1FD8H
LDB %BA,[%Y]+ 1 1 1 1 1 1 1 0 1 1 0 1 0 1FDAH
Flags: E I C Z
↓
– – –
Mode: Src: Register indirect
Dst: Register direct
Extended addressing: Invalid
LDB %BA,%EXT Load EXT reg. into BA reg. 1 cycle
Function: BA
←
EXT
Loads the content of the EXT register into the BA register.
Code: Mnemonic MSB LSB
LDB %BA,%EXT 1 1 1 1 1 1 1 0 1 0 1 1 X 1FD6H, (1FD7H)
Flags: E I C Z
↓
– – –
Mode: Src: Register direct
Dst: Register direct
Extended addressing: Invalid